The Conventional Planar Process
The conventional junction isolated planar process provides the vertical semiconductor device 50 of FIG. 1, wherein the buried layer 52 is formed before the epitaxial layer 54 is grown. The device 50 has a breakdown voltage of about 150-200 volts and about 3-5 amperes maximum capacity, respectively. This process forces the buried layer 52 to be moderately doped so as not to lower the quality of the subsequent epitaxial film. The moderate doping of the buried layer creates a parasitic resistance, which limits the current conduction in the device due to ohmic heating, and causes unacceptably high voltage drops across the device Further processing of the wafer at high temperatures causes the buried layer 52 to updiffuse and thus limit the remaining amount of uncompensated epitaxial film. The updiffusion of the buried layer 52 reduces the breakdown voltage of the vertical device and is self-limiting. As a result, devices which are to have breakdown voltages above 150-200 volts require additional nonstandard processing such as multiple epitaxial layers.
The typical junction isolated planar process starts typically with a lightly doped P wafer 60 in which a deep, moderately doped N layer 62 is selectively formed as shown in FIG. 2. The N layer 62 is called the buried layer and is used to direct the bottom junction current laterally to a vertical diffusion contact to the surface, and thus effectively providing a resistance in series with the active device element. This series resistance is effectively in series with the collector (56 of FIG. 1) or drain of a transistor and thus this limits the current capability while achieving a Vce(Sat) or a Rds(ON) or power dissipation specification. To minimize this series resistance, the buried layer should be as heavily doped as possible. The upper limit of doping is set by the epitaxial process which degrades if the doping becomes too high. The buried layer doping is usually done with arsenic which is used to limit later outdiffusion, but arsenic is difficult to diffuse and results in damage to the substrate wafer if not carefully handled. Moreover, the resistivity of the buried layer is typically limited to 20-50 ohms/square.
The next step in the typical prior art process is the epitaxial growth step providing the structure shown in FIG. 3. The buried layer 62A moves up into the epitaxial layer requiring that the epitaxial layer 64 be grown thick enough such that the thickness 66 of the layer 64 film above the buried layer 62A meets the thickness specification of the semiconductor device. The thickness 66 of the layer 64 film is the parameter that sets the breakdown voltage of the vertical device; the larger the distance 66, the higher the potential breakdown voltage.
The next step in the typical prior art process after the growth of the epitaxial layer 64 is the diffusion of an oppositely doped material to form junction isolated (JI) pockets in the epitaxial layer that will be used to form the device structural elements. Also, a heavily doped ohmic diffusion is done at this time The step of diffusion into the JI pockets comprises the diffusion of a P type material as shown in FIG. 4. The P region 55 must be driven completely through the epitaxial layer 54 into the substrate 51 to achieve complete junction isolation. As this process is gradient driven, it takes increasingly longer times to diffuse a fixed distance down as the diffusion becomes deeper and deeper, resulting in a practical JI diffusion depth of about 20-30 microns. Attempts to increase this depth by etching grooves or recesses into the silicon before diffusion would result in loss of the planarity, except in the case of very narrow trenches which can be backfilled and planarized with a thin film by additional process steps.
Effectively deeper diffusions can be achieved by doing a JI diffusion from both the top and bottom by using a P+ as well as an N buried layer. However, as the isolation diffusion moves down and the buried layer moves up, the usable epitaxial thickness 68 is reduced. Moreover, deep isolation diffusions thus do not necessarily result in a thick uncompensated epitaxial layer. The higher the doping of the buried layer, the faster that it moves up. Thus the competing demands of low resistivity buried layers 52 and high breakdown voltage force a compromise that limits both. Any additional uncompensated epitaxial thickness gained by driving the isolation diffusion region deeper is offset by the buried layer 52 moving up that much further. Typically, driving the isolated diffusion region deeper can result in a 15 micron thick as-grown epitaxial film reducing to only 3 microns of usable epitaxial material left between the top of the buried layer and the bottom of the top diffusion. Translated into operating voltage potential, this means an epitaxial layer 54 with potential ability to operate at 300 volts (using 20 volts/micron) ends up with an operating voltage of only 60 volts. The above-discussed competing diffusions self-limit the effectiveness of the process, resulting in a practical upper limit of this technology, generally agreed to be about 200 volts. Thus, in applications typically including an integrated circuit (IC) which require a high voltage, high current device, a supplemental discrete device must be added to the linear IC thus requiring two or more separate chips.